Senior Memory PHY Architect — Lead High‑Speed I/O & SoCs
amdSanta Clara, CA
Senior Memory PHY Architect — Lead High‑Speed I/O & SoCs
amdSanta Clara, CA
yesterday
Occupations
Computer Hardware EngineersArchitectural and Engineering ManagersElectronics Engineers, Except ComputerIndustries
Semiconductor and Related Device ManufacturingOther Electronic Component ManufacturingPrinted Circuit Assembly (Electronic Assembly) ManufacturingAbout the role
A leading semiconductor company is seeking a Senior Technical Leader to shape Memory PHY technology. You will drive architectural direction and technical decisions for cutting-edge designs in mixed-signal circuits and influence critical project outcomes. Ideal candidates will have over 15 years’ experience in analog and mixed-signal design, especially in high-speed technologies. Join a collaborative team that values deep technical ownership and innovation, while shaping the future of computing architecture.
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JOB OVERVIEW
Experience level
Manager
Location
Santa Clara, CA
Occupation
Computer Hardware Engineers
Industry
Semiconductor and Related Device Manufacturing
Posted
yesterday
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