HBM Interface Architect: Lead High-Speed Memory Design

Micron Technology is seeking a senior memory interface engineer to own HBM IO blocks from architecture through silicon bring-up and post-silicon debugging. You will define HBM PHYs, die-to-die interfaces, and training/calibration strategies for high-speed memory subsystems. You will lead architecture and design of analog, mixed-signal, and digital interfaces and work with packaging, SI/PI, and thermal teams to optimize performance. A strong background in RTL/verification is required.