About the role

Capgemini Engineering in Santa Clara, CA is seeking a seasoned Physical Design Engineer to advance complex digital/mixed-signal IC implementations through floor planning, placement, CTS, routing, and tape-out readiness. You will optimize power, area, and performance while collaborating with cross-functional teams across the design lifecycle.
Key qualifications include: 10+ years in physical design, proficiency with LVS/DRC, CDC, STA, and parasitic delay analyses, and hands-on use of Virtuoso,

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JOB OVERVIEW

Experience level

Lead

Location

Santa Clara, CA

Occupation

Electronics Engineers, Except Computer

Industry

Semiconductor and Related Device Manufacturing

Posted

today

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