Senior System Validation Engineer
cypress hcmSan Jose, CA
$100,000-155,000APPLY NOW (opens in a new tab)
Senior System Validation Engineer
Industries
Electronic Computer ManufacturingSemiconductor and Related Device ManufacturingComputer Systems Design Services$100,000-155,000
APPLY NOW (opens in a new tab)About the role
Job Description:
SeniorSystem Validation Engineer This exciting rolewillberesponsibleforvalidating high-speed memory buffer semiconductor products, developing automation scripts, and ensuring system compliance with performance specifications. The engineer willneed to havedeep experience with processor-memory interfaces (DDR5/DDR6), high-speed signaling, and signal/power integrityto be successful in this role. They are headquartered in the San Jose, CAarea, and this positioncan sit in either San Jose, CA, or Atlanta, GA area. The company is asilicon IP providerfor thesemiconductor manufacturingindustry. If you are an individualwhohas expertise invalidatingmemory buffer chipsandloves tobehands-onandoptimizeprocesses, this role could be for you!
Responsibilities:
Bring up and validate x86-based server systems with high-speed memory buffer products.
Automate lab workflows: develop scripts for lab equipment control and data analysis.
Support applications and design teams in debugging and resolving system-level issues.
Collaborate on DDR system validation, including DDR topologies, protocols, and compliance.
Work with design and validation teams to debug power delivery networks, signal/power noise, and other high-speed design challenges.
Contribute to modeling, simulation, and system-level validation efforts.
Qualifications:
B.S. or M.S. in Computer Engineering, Electrical Engineering, or related field.5+ years of experience in system validation, memory interfaces, or related semiconductor work.
Must have expertise in high-speed interface concepts, including signal integrity and power integrity.
Strong knowledge of processor/memory system architecture (DDR5/DDR6 preferred).Experience with modeling/simulation tools for system-level validation.
Hands-on experience with x86 computer/server platforms (Intel/AMD).Skilledwith lab test and measurement equipment, troubleshooting, and debugging.
Proficiency in scripting/programming (Python, C/C++); automation experience is a plus.
Strong collaboration skills; works effectively with lab engineers, circuit designers, and validation teams.
Experience with BIOS, firmware, DDR memory, or lab bench testing ispreferable.
Salary Range: $100,000-155,000+depending onexperienceand location. Weekly
Schedule:
Hybridschedule(3 days onsite and2 days remote), based in either San Jose, CA, or Johns Creek, GA
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JOB OVERVIEW
Salary
$100,000-155,000
Experience level
Lead
Location
San Jose, CA
Occupation
Validation Engineers
Industry
Electronic Computer Manufacturing
Posted
today
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