Director of Test Engineering — RF & High‐Speed Semiconductor
point2 technologySan Jose, CA
Director of Test Engineering — RF & High‐Speed Semiconductor
point2 technologySan Jose, CA
today
Occupations
Architectural and Engineering ManagersElectronics Engineers, Except ComputerMicrosystems EngineersIndustries
Semiconductor and Related Device ManufacturingResearch and Development in the Physical, Engineering, and Life Sciences (except Nanotechnology and Biotechnology)Radio and Television Broadcasting and Wireless Communications Equipment ManufacturingAbout the role
Director of Test Engineering — RF & High‑Speed SemiconductorOverview
Lead Point2’s test engineering organization responsible for validating advanced RF, high‑speed analog, and mixed‑signal semiconductor products. Own test strategy, infrastructure, and execution across wafer, package, and system‑level testing to ensure performance, reliability, and manufacturability.
Responsibilities:
Lead and mentor the Test Engineering team across characterization, validation, and production test.
Define test strategies for RF, high‑speed analog, and mixed‑signal semiconductor devices.
Oversee ATE program development, load boards, probe cards, and automated test systems.
Drive RF/mmWave/sub‑THz measurement methodologies and silicon bring‑up.
Partner with design, product, packaging, and operations teams to ensure testability and yield.
Manage vendor relationships with OSATs, test houses, and equipment suppliers.
Support customer evaluations, reliability testing, and production readiness.
Qualifications:
10+ years in semiconductor test engineering with leadership experience.
Strong background in ATE development and high‑frequency measurement equipment.
Experience with wafer‑probe, package‑level test, and high‑volume manufacturing.
Excellent communication and cross‑functional leadership skills.
BS/MS in Electrical Engineering or related field; Ph.D. a plus.
Location(s)
Irvine, CA (Orange County area)
Seoul, South Korea
We thank all applicants for their interest in Point2 Technology. Due to the volume of applications received, only candidates selected for an interview will be contacted.
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JOB OVERVIEW
Experience level
Manager
Location
San Jose, CA
Occupation
Architectural and Engineering Managers
Industry
Semiconductor and Related Device Manufacturing
Posted
today
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