Senior RTL/SoC Verification Engineer

Core ASIC Inc in San Diego seeks an experienced RTL Verification engineer with 5 to 15 years in SystemVerilog and UVM. You will verify complex SoCs, drive functional verification, and collaborate across design, test, and firmware teams to ensure quality tape-outs. The role requires strong knowledge of AMBA protocols and high-speed interfaces, experience with Synopsys/Cadence tools, and scripting for automation.