About the role

Altera Corporation is seeking a Physical Design Engineer in San Jose, CA to implement advanced IP and SoC designs, driving timing closure, power optimization, and signoff for next-generation FPGA products. You will collaborate with RTL, DFT, CAD, architecture, verification, and product engineering teams to deliver manufacturing-ready silicon, with emphasis on performance, reliability, and efficiency. Strong analytical and scripting skills are required for flow automation.

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JOB OVERVIEW

Experience level

Lead

Location

San Jose, CA

Occupation

Computer Hardware Engineers

Industry

Semiconductor and Related Device Manufacturing

Posted

yesterday

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