Interface Design Verification Engineer
swits digital privateSan Jose, CA
Interface Design Verification Engineer
swits digital privateSan Jose, CA
today
Industries
Computer Terminal and Other Computer Peripheral Equipment ManufacturingComputer Systems Design ServicesElectronic Computer ManufacturingAbout the role
Job Title: Interface Design Verification Engineer
Location: San Jose, CA
Job Description:
Looking for engineers with strong protocol expertise to verify industry-standard interface IPs such as PCIe, DDR, Ethernet, USB, etc.
Key Responsibilities:
- Verify interface IPs for protocol compliance and robustness
- Develop UVM testbenches using VIPsExecute corner-case and stress testing
- Analyze protocol-level failures and debug issues
- Work with design teams to ensure spec compliance
Required Skills:
- Strong knowledge of standard protocols (PCIe/DDR/USB/Ethernet)
- Expertise in System Verilog, UVM, and VIP integration
- Experience with protocol analyzers and debugging
Good to Have: Experience in high-speed interfaces Understanding of PHY-layer concepts
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JOB OVERVIEW
Experience level
Lead
Location
San Jose, CA
Occupation
Validation Engineers
Industry
Computer Terminal and Other Computer Peripheral Equipment Manufacturing
Posted
today
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