Principal PE Validation Engineer — Memory Interface
rambuscomSan Jose, CA
Principal PE Validation Engineer — Memory Interface
rambuscomSan Jose, CA
today
Industries
Electronic Computer ManufacturingComputer Terminal and Other Computer Peripheral Equipment ManufacturingComputer Storage Device ManufacturingAbout the role
Rambus seeks a Principal Validation Engineer for its Memory Interface Chip unit in California. The role focuses on lab bring-up, validating high-speed memory designs, and developing automated scripts for lab data analysis.
Strong memory system and high-speed signaling knowledge are required, with hands-on hardware experience including x86 systems. The position is full-time with hybrid work options, offering base salary, bonus, equity, and benefits.
Matching similar jobs
JOB OVERVIEW
Experience level
Lead
Location
San Jose, CA
Occupation
Validation Engineers
Industry
Electronic Computer Manufacturing
Posted
today
Tired of running searches?
Rank the roles you'd take once, and matches like these arrive on their own.
CREATE PROFILE