Senior FPGA Architect - Memory Test Solutions
teradyneSan Jose, CA
Senior FPGA Architect - Memory Test Solutions
teradyneSan Jose, CA
yesterday
Occupations
Computer Hardware EngineersElectronics Engineers, Except ComputerComputer Systems Engineers/ArchitectsIndustries
Computer Systems Design ServicesSemiconductor and Related Device ManufacturingElectronic Computer ManufacturingAbout the role
Teradyne’s Memory Test Division (MTD) seeks a motivated and technically driven FPGA Engineer to support the development of our cutting-edge memory test solutions. You will design and implement FPGA-based architectures for next-gen Flash and DRAM instrumentation, combining digital and analog design, and collaborate with cross-functional teams.
You will mentor junior engineers, translate customer needs into robust, scalable FPGA designs, and help maintain existing FPGA portfolios to meet quality
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JOB OVERVIEW
Experience level
Lead
Location
San Jose, CA
Occupation
Computer Hardware Engineers
Industry
Computer Systems Design Services
Posted
yesterday
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