About the role

WD is seeking a Senior Analog IC Design Engineer to design high-performance analog and mixed-signal blocks in advanced CMOS processes. You will work on transistor- and block-level architectures, simulations, verification, and cross-functional collaboration. This role requires extensive experience, a track record of design releases, and proficiency with Cadence, Mentor, Siemens, and Ansys in a California setting.

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JOB OVERVIEW

Experience level

Lead

Location

San Jose, CA

Occupation

Electronics Engineers, Except Computer

Industry

Semiconductor and Related Device Manufacturing

Posted

2 days ago

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