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About the role

River AI is hiring an exceptional RTL design engineer to architect and implement high-performance AI accelerator SoCs. You will own architecture, micro-architecture, and RTL, collaborating with verification, physical designers, and software teams to optimize PPA and deliver scalable silicon. You will work across the stack with compiler and performance models, tackling complex design challenges on advanced process nodes, with a focus on power-efficient data paths and high throughput.

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JOB OVERVIEW

Experience level

Lead

Location

Palo Alto, CA

Occupation

Computer Hardware Engineers

Industry

Software Publishers

Posted

2 days ago

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