Senior Analog & Mixed-Signal PLL Designer
samsungsemiconductorSan Jose, CA
Senior Analog & Mixed-Signal PLL Designer
samsungsemiconductorSan Jose, CA
yesterday
Occupations
Electronics Engineers, Except ComputerComputer Hardware EngineersElectrical and Electronics DraftersIndustries
Semiconductor and Related Device ManufacturingOther Electronic Component ManufacturingPrinted Circuit Assembly (Electronic Assembly) ManufacturingAbout the role
Samsung Semiconductor, Inc. is seeking a talented Senior/Staff PLL Designer to develop high‑performance PLL and clocking subsystems for RF transceivers, SerDes, and high‑speed I/O.
You will design and verify frequency synthesizers and clock generation circuitry in advanced CMOS tech. The role requires extensive hands‑on experience with VCOs, DCOs, phase detectors, and related circuitry, plus strong CAD tool proficiency and layout skills.
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JOB OVERVIEW
Experience level
Lead
Location
San Jose, CA
Occupation
Electronics Engineers, Except Computer
Industry
Semiconductor and Related Device Manufacturing
Posted
yesterday
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