ASIC Physical Design Engineer: Floorplan to Tape-out
resource logisticsCalifornia, MO
ASIC Physical Design Engineer: Floorplan to Tape-out
resource logisticsCalifornia, MO
yesterday
Industries
Semiconductor and Related Device ManufacturingProcess, Physical Distribution, and Logistics Consulting ServicesResearch and Development in the Physical, Engineering, and Life Sciences (except Nanotechnology and Biotechnology)About the role
Resource Logistics Inc. is seeking an experienced ASIC physical design engineer to drive block-level implementation from floorplan to tape-out. You will optimize floorplans, placement, CTS, routing, and ECO activities to meet timing, power, area, and congestion targets.
Collaborate with STA, DFT, and RTL teams while developing automation scripts in TCL, Perl, and Python to boost productivity and ensure sign-off readiness.
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JOB OVERVIEW
Experience level
Lead
Location
California, MO
Occupation
Electronics Engineers, Except Computer
Industry
Semiconductor and Related Device Manufacturing
Posted
yesterday
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