Senior Staff FPGA & IP Integration Engineer

Lattice Semiconductor is seeking a Senior Staff Integration Design Engineer in San Jose to drive IP integration, sector-level design, and tapeout-ready design flows. You will own the sector constraints, coordinate with DFT and IP teams, and ensure robust power data integration into full-chip models. The role demands deep Verilog/SystemVerilog expertise, extensive FPGA/ASIC experience, and leadership across cross-functional teams.