Principal Engineer, DRAM Circuit Design
samsung semiconductorSan Jose, CA
Principal Engineer, DRAM Circuit Design
Industries
Semiconductor and Related Device ManufacturingResearch and Development in the Physical, Engineering, and Life SciencesOther Electronic Component ManufacturingAbout the role
Overview:
In this role you will shape the next generation DRAM by designing architectures and optimizing layouts for high-performance memory. You will collaborate with process integration, device modeling, and cross-functional teams to drive technology optimization and ensure robust power delivery and data paths. This position offers impact at scale within a global memory leader, with onsite work in San Jose and opportunities to influence product performance and manufacturability. You will work closely with internal and external customers to document specifications and validate designs, contributing to Samsung’s memory leadership. Compensation / Benefits 4+ weeks paid time off holidays and sick leave fertility/adoption stipend caregiver support medical travel support on-site café and gym
Responsibilities:
Develop DRAM architecture and optimize floor plans for next-generation DRAM Design row/column bank circuits, data paths, and test modes Identify device requirements for advanced memory product design Collaborate with process integration and device modeling groups for architecture and optimization Characterize power delivery networks and optimize circuit/architecture Analyze electrical data from silicon and validate core design performance Engage with cross-functional teams including process integration, QA, and product engineers Document design specifications, performance analyses, and test plans Interact with internal and external customers on technical matters Complete other responsibilities as assigned
Key requirements:
BS with 18+ years of DRAM design engineering or MS with 15+ years or PhD with 12+ years in semiconductor field (preferred) Preferred knowledge in memory design Proficiency with design software and statistical analysis tools Inclusive, adaptable to diverse global norms Curious, resilient, data-driven learner Collaborative, relationship-building mindset Innovative and quick to adapt to change collaborative mindset adaptability curiosity DRAM circuit design memory architecture floorplanning for DRAM
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JOB OVERVIEW
Experience level
Lead
Location
San Jose, CA
Occupation
Electronics Engineers, Except Computer
Industry
Semiconductor and Related Device Manufacturing
Posted
today
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