About the role

AMD's Cores Organization seeks an experienced VLSI RTL design engineer to invent and implement high-performance Cache and Routing Fabric designs. The role is based in Fort Collins, CO, with potential relocation or travel to Austin, TX. You will work with Cache and CPU Architects and collaborate across Design Verification, Physical Design, and Test teams. The ideal candidate has strong Verilog HDL skills, Digital RTL design experience, and a track record of cross-functional collaboration on

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JOB OVERVIEW

Experience level

Lead

Location

Fort Collins, CO

Occupation

Computer Hardware Engineers

Industry

Semiconductor and Related Device Manufacturing

Posted

yesterday

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