Senior ASIC Design Engineer - High-Perf Networking (Hybrid)

Hewlett Packard Enterprise is seeking a highly motivated ASIC Design Engineer to join our networking silicon development team in Durham, NC. This hybrid role will involve architecting modules for high-performance networking chips and delivering verified RTL across power, area, and timing targets. You will write specs, implement using Verilog/SystemVerilog, develop coverage in SVA, and mentor new engineers while collaborating with Physical Design and Verification teams.