HBM SoC Physical Design Engineer — PPA Master

Micron Technology in Richardson, TX, seeks a SoC Physical Design Engineer to lead physical implementation from netlist to GDSII for advanced HBM/DRAM‑adjacent designs. You will work with RTL, verification, DFT, IP, packaging and manufacturing to optimize PPA and ensure robust tape-out. Responsibilities include floorplanning, placement, CTS, routing, clocking and signoff coordination, with a focus on power integrity and resistance to variations.